This document provides a detailed description of the 80C51 microcontroller, including:
- port drivers
- Timers/Counters
- Serial Interface
- Interrupt System
- Reset
- Reduced Power Modes
• Editorial updates.
• Table 40 “PLL configuration examples” updated.
• Register bit description of Table 92 “Pattern match bit-slice source register (PMSRC, address 0xA000 402C) bit description” updated.
• Chapter 5 “LPC800 Reduced power modes and Power Management Unit (PMU)” updated.
• Section 5.3.1 “Low power modes in the ARM Cortex-M0+ core” added.
• Removed dependency on system frequency for flash access times in Table 213 “Flash configuration register (FLASHCFG, address 0x4004 0010) bit description”.