lpc12xx

OM13042 - KNX Development Board

 

This OM13042 development board has been developed by NXP in cooperation with ON Semiconductor and Weinzierl Engineering and is available at NXP Distributors.

KNX on LPC Microcontrollers

Software Encryption for NXP ARM Microcontrollers

Introduction

How to calculate the value of crystal load capacitors?

Oscillator

The following formula may be used to calculate a parallel resonant crystal's external load capacitors:
CL = ((CX1 x CX2) / (CX1 + CX2)) + Cstray
where:
CL = the crystal load capacitance
Cstray = the stray capacitance in the oscillator circuit, which will normally be in the 2pF to 5pF range.

Assuming that CX1=CX2 then the equation becomes:
CL = ((CX1 x CX1) / (2 x CX1)) + Cstray
CL = (CX1 / 2) + Cstray
Rearranging the equation, we can find the external load capacitor value:
CX1 = 2(CL - Cstray)

For example, if the crystal load capacitance is 15pF, and assuming Cstray=2pF, then:

LPC122x用户手册(简体中文)

LPC微控制器's picture
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修订版2 — 2011年9月19日
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LPC122x用户手册简体中文版

LPC122x扩展了恩智浦32位ARM微控制器系列产品,在工厂和家庭自动化领域具有广泛的工业用途。LPC122x得益于ARM Cortex-M0 Thumb指令集,相比执行一般任务的常用8/16位微控制器,代码密度高出50%。LPC122x的另一个特色是针对Cortex-M0优化的ROM型除法库算术,其算法性能比软件型除法库高出数倍,并且具有确定性极高的周期时间和更小的闪存代码。ARM Cortex-M0的高效性还有助于LPC122x在类似应用中达到较低的平均功率。
LPC122x的CPU工作频率高达45MHz。其提供的闪存选择范围广泛,从32kB 到128kB。闪存的较小512字节页擦除具有多种设计优点,如更精细的EEPROM模拟,来自任何串行接口的引导加载支持,以及减少了片上RAM缓冲器需求的轻松现场编程。
LPC122x的外设补充包括一个10位ADC、两个具有输出反馈环路的比较器、两个UART、一个SSP/SPI接口、一个具有超快速模式功能的I2C总线接口、一个视窗化看门狗定时器、一个DMA控制器、一个CRC引擎、四个通用定时器、一个32位RTC、一个用于波特率生成的1%内部振荡器和最多55个通用I/O(GPIO)引脚。
LPC1227可用作双芯片模块,将LPC1227与PCF8576D LCD驱动器相集成。

LPC122x产品数据手册(简体中文)

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Rev. 1.2 – 2011年3月29日
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LPC122x产品数据手册简体中文版

LPC122x系列继续扩展了恩智浦的32位微控制器产品,定位于工业和家庭自动化领域的广泛应用。得益于ARM Cortex-M0的Thumb指令集,LPC12xx可以在执行典型任务时将代码密度较8位/16位单片机提高50%。LPC122x还拥有一个为Cortex-M0设计而优化的基于ROM的除法库。它的算术性能是基于软件的算法库的数倍,并且有高度确定的周期时间,同时也减少了Flash的代码量。Cortex-M0的高效率,也有助于LPC122x在相同应用中实现较低的平均功耗。
LPC122x的CPU工作频率最高达45MHz。它提供了较宽容量的Flash存储器,从32KB到128KB。Flash存储器的擦除扇区为512字节,这可以带来许多设计上的好处,比如更好地模拟EEPROM,从任何串行接口引导加载程序,方便进行在现场编程(这减少了对片内RAM缓冲的要求)。
LPC122x的外设组件包括一个10位ADC、两个带有输出反馈的模拟比较器、两个UART接口、一个SSP/SPI接口、一个带有Fast-mode Plus功能的I2C接口、一个窗式看门狗定时器、一个DMA控制器、一个CRC模块、四个通用定时器、一个32位RTC、一个精度为1%的内部振荡器(用于波特率产生)和多达55个通用I/O引脚。

After a software reset like WD reset, BOD reset, is the SRAM content retained?

NXP_appMan's picture

Yes. In case of a software reset like WD reset, BOD reset etc, the SRAM contents (memory address 0x1000 0000 to 0x1000 2000 in case of LPC1227 ) is retained. However, the part won't retain the contents if it goes to deep power-down mode or if the microcontrollers is unpowered.

When I start debugging (using LPCXpresso, Keil, IAR), I noticed that my program started in the bootROM area (0x1FFF_xxxx) although the program download is done and verification is correct

On the MCU, please check if the ISP pin is activated (ie. pulled LOW). Otherwise, every time the JTAG / SWD is reset, the MCU will go into bootROM, instead of the user program.

How do I configure Lpcxpresso to place code in RAM?

NXP_appMan's picture

To place code in RAM, follow the link here:

http://support.code-red-tech.com/CodeRedWiki/CodeInRam

The datasheet mentions the I/O pins are 5V tolerant if Vdd is present. Can you explain in detail what this implies?

NXP_appMan's picture

The IO pin will be 5V tolerant if the supply voltage Vdd is present, and they are configured as inputs. VDDIO must be applied to the microcontroller when input voltage is 5V, or else the 5V tolerance does not apply.

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