emWin Graphic Library with Graphical User Interface
User & Reference Guide
Document: UM03001
Software version: 5.20
Document revision: 2
Date: March 8, 2013

V1.1 Applied patch by segger to update from V5.20C to V5.20D.
-----------------------------------------------------------------------------------

Introduction

The following formula may be used to calculate a parallel resonant crystal's external load capacitors:
CL = ((CX1 x CX2) / (CX1 + CX2)) + Cstray
where:
CL = the crystal load capacitance
Cstray = the stray capacitance in the oscillator circuit, which will normally be in the 2pF to 5pF range.

Assuming that CX1=CX2 then the equation becomes:
CL = ((CX1 x CX1) / (2 x CX1)) + Cstray
CL = (CX1 / 2) + Cstray
Rearranging the equation, we can find the external load capacitor value:
CX1 = 2(CL - Cstray)

For example, if the crystal load capacitance is 15pF, and assuming Cstray=2pF, then:

Yes. In case of a software reset like WD reset, BOD reset etc, the SRAM contents (memory address 0x1000 0000 to 0x1000 2000 in case of LPC1227 ) is retained. However, the part won't retain the contents if it goes to deep power-down mode or if the microcontrollers is unpowered.

BSDL Files for LPC315x for TFBGA-280 package

BSDL Files for LPC313x, LPC314x for TFBGA-180 package

IBIS Model for LPC3152, LPC3154 TFBGA-208 package

IBIS Model for LPC3130, LPC3131 TFBGA-180 package

1. Introduction

The NXP LPC314x combine a 270 MHz ARM926EJ-S CPU core, High-speed USB 2.0 OTG, 192 KB SRAM, NAND flash controller, flexible external bus interface, three channel 10-bit A/D, and a myriad of serial and parallel interfaces in a single chip targeted at consumer, industrial, medical, and communication markets. To optimize system power consumption, the LPC314x have multiple power domains and a very flexible Clock Generation Unit (CGU) that provides dynamic clock gating and scaling.