The LPC18xx are ARM Cortex-M3 based microcontrollers for embedded applications.
The ARM Cortex-M3 is a next generation core that offers system enhancements such as
low power consumption, enhanced debug features, and a high level of support block
integration.
The LPC18xx operate at CPU frequencies of up to 180 MHz. The ARM Cortex-M3 CPU
incorporates a 3-stage pipeline and uses a Harvard architecture with separate local
instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3
CPU also includes an internal prefetch unit that supports speculative branching.
The LPC18xx include up to 200 kB of on-chip SRAM data memory (flashless parts) or up
to 136 kB of on-chip SRAM and up to 1 MB of flash (parts with on-chip flash), a quad SPI
Flash Interface (SPIFI), a State Configurable Timer (SCT) subsystem, two High-speed
USB controllers, Ethernet, LCD, an external memory controller, and multiple digital and
analog peripherals.
Remark: This user manual describes the Rev ‘-’ and Rev ‘A’ versions of parts
LPC1850/30/20/10 (flashless parts) and provides a preliminary description of the
flash-based LPC18xx parts.
The following peripherals are available on LPC1850/30/20/10 Rev ‘A’ only:
• I2S1
• C_CAN1
• GPIO pin interrupts
• GPIO group interrupt 0/1
• Global Input Multiplexer Array (GIMA)
English
简体中文
