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After a software reset like WD reset, BOD reset, is the SRAM content retained? |
2012-12-04 12:13 |
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Are the LCD controller signals LVDS? |
2012-11-20 16:17 |
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Are there Ethernet bootloaders available for LPC1700 and LPC2300/2400? If so, where can I find it? |
2012-11-19 10:07 |
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Do you have size limit or memory size calculator to help set the size of the frame buffer? |
2012-11-20 16:28 |
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How can I identify the Ethernet MAC ID to differentiate between 23xx/24xx/17xx? |
2012-12-11 15:30 |
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How is the LPC2478 32-bit External Memory Controller different than the LPC1788 32-bit External Memory Controller? |
2013-04-01 13:32 |
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How to calculate the value of crystal load capacitors? |
2012-12-21 14:25 |
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If the LCD controller has a lower priority on the EMC bus, refreshes will be stalled. How noticable is this on the screen? |
2012-11-20 16:33 |
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Is the LCD DMA a gather scatter DMA ? Where is it located exactly ? |
2012-11-20 16:39 |
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Is the LCD DMA located in the LCD macrocell or the GP DMA ? |
2012-11-20 16:40 |
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Is the LPC1788 pin compatible with the LCP2478? |
2012-11-20 16:41 |
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Is there dedicated on-board SRAM memory specifically for the frame buffer? |
2012-11-20 16:42 |
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The datasheet mentions that the SCL0 and SDA0 pins require external pull-ups regardless of PINMODE / IOCONF / PINSEL configuration. But on SCL1, SDA1, SCL2, and SDA2 look to be able to use an internal pull-up ? |
2012-11-27 00:22 |
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The datasheet mentions the I/O pins are 5V tolerant if Vdd is present. Can you explain in detail what this implies? |
2012-11-21 16:03 |
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What platforms are supported by LPCXpresso? |
2012-11-19 13:26 |
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When using LPC23xx or LPC24xx Rev B silicon, the Ethernet worked fine, however, when we switched to Rev D silicon, the Ethernet interface is no longer working. |
2012-12-11 15:31 |
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Where should I go for LPCXpresso related support? |
2012-11-19 13:28 |
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Will using a 16-bit external bus be too slow for LCD, causing tearing to occur? |
2012-11-20 16:46 |