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After a software reset like WD reset, BOD reset, is the SRAM content retained? |
2012-12-04 12:13 |
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Are the LCD controller signals LVDS? |
2012-11-20 16:17 |
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Do you have size limit or memory size calculator to help set the size of the frame buffer? |
2012-11-20 16:28 |
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How to calculate the value of crystal load capacitors? |
2012-12-21 14:25 |
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If the LCD controller has a lower priority on the EMC bus, refreshes will be stalled. How noticable is this on the screen? |
2012-11-20 16:33 |
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Is the LCD DMA a gather scatter DMA ? Where is it located exactly ? |
2012-11-20 16:39 |
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Is the LCD DMA located in the LCD macrocell or the GP DMA ? |
2012-11-20 16:40 |
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Is there dedicated on-board SRAM memory specifically for the frame buffer? |
2012-11-20 16:42 |
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Will using a 16-bit external bus be too slow for LCD, causing tearing to occur? |
2012-11-20 16:46 |
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