I'm using the LPC Link2 with my LPCXpresso LPC1769. The LPC Link is brand new and has the J-Link firmware flashed. The chip gets recognized, I can read/write its memory and start debugging with Segger's GDB-Server. However it seems like the chip is never reset, which makes it difficult to start debugging from a known state.
It is possible to trigger the reset manually in the J-Link Commander. It also fails there, but luckily gives an error message:
WARNING: RESET (pin 15) high, but should be low. Please check target hardware.
I looked at the schematic and measured both signals the prebuffered GPIO5_5_JTAG_RESET as well as JTAG_RESET and they indeed stay high. Now I'm unsure if this is a bug in the firmware or a hardware defect. Can somebody try to reproduce the error?
Steps to reproduce:
1. Flash Segger J-Link Firmware
2. Connect LPC Link2 using J-Link commander
3. Try to pull the reset line low using the "r0" command
JP1 and JP2 are in place