Just read through AN11508, SDRAM Interface, and have a couple of questions. I am using a single x16 SDRAM ( 4M x 16bit ). My CPU is the LPC1837JET256.
I am looking at figure 6 in the app note.
- Can I use any single DYCSx line that I want as long as the coresponding CKEx line is also used?
- For 16 bit I will be using DQM1 and DQM0 only. Correct?
- What do I do with the feedback pins, CLK0 and CLK2? Just a pad with no trace routed?
- Inside the CPU the signals are listed as EMC_CLK01 and EMC_CLK_23 but the pins CLK0 and CLK2 are used. Do I really use pins CLK0 and CLK2 or
should I be using pins EMC_CLK01 and EMC_CLK_23. On the 256 ball package EMC_CLK2 and EMC_CLK_23 are on different balls.
- Lastly, is there a approved vendor listing of SDRAMs?