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LPC SPIFI Peripheral

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SPIFI: SPI Flash Interface

 

Introduction:

The SPI Flash Interface (SPIFI) allows low pin-count serial flash memories to be connected to an ARM based LPC Microcontroller with very little performance penalty compared to higher pin-count parallel flash memories. After a few commands configure the interface at startup,the entire flash content is accessible as normal memory using byte, halfword, and word accesses by the processor and/or DMA channels.Erasure and programming are handled by simple sequences of commands. 

Many SPI flash devices use serial commands for device setup/initialization, and then move to dual or quad commands for normal operation. Different serial Flash vendors and devices accept or require different commands and command formats. SPIFI includes sufficient flexibility to be compatible with many market-leading devices plus extensions to help insure compatibility with future devices.

The SPIFI implements basic, dual, and quad SPI in half-duplex mode, in which the SPIFI always sends a command to a serial flash memory at the start of each frame. In write commands, the SPIFI sends all of the data in the frame, while in read commands, the SPIFI sends the command, and then the serial flash sends data to the SPIFI. SPI Flash devices respond to commands sent by software, or automatically sent by the SPIFI when software reads the serial flash region of the memory map. Commands are divided into fields called opcode, address, intermediate data, and data. The address,intermediate data, and data fields are optional depending on the opcode. Some devices include a mode in which the opcode can be implied in Read commands for higher performance. Data fields are further divided into input and output data fields depending on the opcode.

 

SPIFI Features:

  • Quad SPI Flash Interface (SPIFI) to external flash.
  • Transfer rates of up to SPIFI_CLK/2 bytes per second.
  •  External flash is directly memory mapped for fast access.
  •  Supports 1-, 2-, and 4-bit bi-directional serial protocols.
  • Transfer protocol compatible with various vendors and devices.
  • The SPIFI memory is accessible by the DMA.
  • Software driver library is available.
  • Supports execute-in-place (direct code execution from the SPI Flash memory) and general read/write/erase operations.
  • Built-in cache to give high-performance code execution.       
  • Allows designers to use a small, inexpensive serial flash in place of larger, more expensive parallel flash. 
  • With SPIFI, the external serial flash appears in the microcontroller’s memory map and can be read like other on-chip memory.                                                                                                                                                                                                                                                                                                                                 

Supported Devices:

Device Memory Size Boot Support Execute in place(XIP)
LPC1800       128MB Yes Yes
LPC4300 128MB Yes Yes
LPC18S00   128MB Yes Yes
 LPC43S00  128MB  Yes Yes
 LPC407x_8x  16MB  No Yes

 

Boot from SPIFI:

LPC1800/4300 devices support boot from flash.The boot code sets the SPIFI clock to 32 MHz at the beginning of the boot process and checks for
the type of SPI flash device. If the detected device is unknown, the SPIFI clock is reduced to 18 MHz,otherwise device boot with a SPIFI clock of 32MHz
  • Any device that can accept a 03 read serial opcode after receiving an FF opcode is expected to boot successfully.
  • A device that switches to quad opcodes and doesn't return after an 0xff reset to serial mode might not boot after a reset.

                                                                                                                                                                                                                                                                                                                                                                                                                                                                

Device Boot Support Exit from no opcode mode Comments
Chingis

PM25LD040, PM25LD010C, PM25LD020C, PM25LD512C, PM25LD256C, PM25LQ032C

Yes  
Giga Device

GD25Q80

Yes                          
ESMT

F25L08PA, F25L16PA, F25L16QA, F25L32QA, F25L64QA

Yes  
Macronix

MX25L6435E, MX25L8006E, MX25L1606E, MX25L8035E, MX25L1633E, MX25L3235E, MX25L6435E, MX25L12835E, MX25L25635E, MX1635E    

Yes                                                                                                

MX25L12835F, MX25L25635F

Yes

These devices take longer time to be ready after power on. You may need  to delay the startup of LPC18xx/LPC43xx.One way to achieve this sequence is to delay RESETN signal of LPC18xx/LPC43xx.

Micron

M25PX80, M25PX16, M25PX32, M25PX64, M25P10, M25P16, M25P32, M25P64, M25P80

Yes

 

N25Q032A, N25Q064A, N25Q128A, N25Q256A

No*

LPC18xx/LPC43xx support cold boot with these devices. May not boot when LPC18xx/LPC43xx is reset and serial flash is in no Opcode mode. In case of planned reset, MCU can get serial flash out of No Opcode mode before resetting itself. 
Spansion

S25FL032P, S25FL064P, S25FL128S, S25FL256S, S25FL256S, S25FL129P, S25FL004K, S25FL008K,

S25FL016K, S25FL032K, S25FL064K, S25FL116K, S25FL132K, S25FL164K,S25FL127S

Yes  

SST(Microchip)

SST25VF064,SST25VF016 Yes  

Winbond

 W25Q80BV,W25Q16DV,W25Q32FV,W25Q64FV,W25Q128FV,W25Q256FV Yes  

 Remarks: To boot from serial flashes, it is recommended that customers fully characterize the timing in their applications.

SPIFI Library:

For library support please visit here

Code Examples: 

Full code example showing XIP and erase/program on Keil MCB1800 board can be found here

Full code example showing XIP and erase/program on NGX Xplorer 1830 board can be found here

Use Cases:

Image Storage and direct transfer to LCD                                                   

 The system Diagram at left side is shown for LPC4300 series of microcontroller. It is also applicable for LPC1800 and LPC4000 series of microcontrollers.

  • Image stored within external serial flash memoryHigh speed quad SPI interface allows images to be transferred directly to LCD controller using DMA
  • Does not use precious internal SRAM – available for other uses. This is the advantage of SPIFI based system.

   See  application note AN11206: Using SPIFI with LCD on LPC1800 and LPC4300

 

Secure image storage

 LPC18S00 and LPC43S00 can use encrypted image stored in an inexpensive QSPI flash.

 See application note  AN11648: LPC18Sxx_43Sxx Secure boot from QSPI device

Programming Tools:

SPIFI devices can be programmed using stand alone tool called LPCScrypt. For more detail information how to program SPIFI devices please visit LPCScrypt page LPCScrypt

Other useful resources:

 http://www.lpcware.com/content/blog/introduction-spifi

 http://www.lpcware.com/content/faq/lpcxpresso/lpc18-lpc43-spifi-flash-drivers

 

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